The present invention relates to high-density magnetic recording of digital data, and more specifically concerns electronic circuits and methods for producing very accurate timing variations in the clocking of high-speed write data to be recorded upon magnetic media, so as to compensate for nonlinear properties of the media.
The magnetic recording art has long known that narrow pulses in certain patterns of digital data signals experience pulse compression and other nonlinear pulse-edge displacement effects when stored magnetically on a disk file. The resulting data read back from the disk has a hundred times higher error rate because the nonlinear edge timing shifts reduce the timing margin for error of the data detection system. If the pattern-dependent edge shifts can be ascertained for the particular medium, then it is possible to preshift the write data pulse edges by an amount equal and opposite to the direction in which the medium will shift them, so that data with the correct timing relationships will be read back from the disk. Such timing precompensation can decrease error rates enough to allow disk-file capacity gains as high as twenty percent. Particular algorithms for determining which pulse edges to shift are well known, and do not form a part of the present invention.
The amount of capacity improvement obtainable for any algorithm depends strongly upon the accuracy of the time shifts delivered by the precompensation circuit. The shifts are typically small, on the order of 1 nsec to 8 nsec: and the pulse frequencies are very high, about 27 MHz.
One conventional technique for obtaining time shifts and delays for this purpose is to use RC or other analog timing circuits. This technique is severely limited by component tolerances and environmental factors such as temperature.
Another technique relies upon propagation delays of logic gates to determine time intervals of pulse edge shifts. However logic-gate delays are inherently highly variable with environmental factors and process variations.
A third method is to synchronize all signals to a compensation clock operating at a frequency high enough to allow all precompensation intervals to be specified in integral numbers of cycles of the compensation clock. At current disk-drive speeds, such a clock would have to operate at 1 GHz. The logic gates, wiring, and shielding necessary for this frequency make this method impractical. (Although circuit technology might advance to such speeds, advances in recording technology will undoubtedly raise the speed requirement at a comparable pace.)